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Open Hardware/Modding: RISC-V, PIXO Pixel, Arduino

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Hardware
  • RISC-V gains momentum as it moves from MCUs to Linux-friendly SoCs

    The open source RISC-V ISA has evolved quickly into silicon, thanks to help from companies like SiFive and Microsemi. SiFive’s HiFive Unleashed board should arrive less than two years after SiFive announced its first Linux-driven Freedom SoCs.

    It’s been two years since the open source RISC-V architecture emerged from computer labs at UC Berkeley and elsewhere and began appearing in soft-core implementations designed for FPGAs, and over a year since the first commercial silicon arrived. So far, the focus has primarily been on MCU-like processors, but last October, SiFive announced the first Linux-driven RISC-V SoC with its quad-core, 64-bit bit Freedom U540 (AKA U54-MC Coreplex). A few days ago at FOSDEM, SiFive opened pre-sales for an open source HiFive Unleashed SBC that showcases the U540.

  • SiFive releases Linux SoC processor and board

    SiFive Inc. (San Mateo, Calif.), a startup that is offering processor cores that comply with the RISC-V open source architecture, has launched a Linux-capable RISC-V based processor chip, the Freedom U540 SoC.

  • Chip Embarks As First Linux-Capable RISC-V Based SoC

    SiFive launches what it calls the industry's first Linux-capable RISC-V based processor SoC. The company recently demonstrated the first real-world use of the HiFive Unleashed board featuring the Freedom U540 SoC, based on its U54-MC Core IP. During the demo, SiFive provided updates on the RISC-V Linux effort, surprising attendees with an announcement that the presentation had been run on the HiFive Unleashed development board. With the availability of the HiFive Unleashed board and Freedom U540 SoC, SiFive has brought to market the first multicore RISC-V chip designed for commercialization, and now offers the industry's widest array of RISC-V based Core IP.

  • PIXO Pixel - Open Source LED Display for Makers

    Sean Hodgins is an inventor and maker interested in purposing current technologies in new and different ways. He’s currently running a crowdfunding campaign on Kickstarter for the PIXO Pixel, an open source RGB display that controls 256 LEDs.

  • AFRL, NextFlex leverage open-source community to create flexible circuit system

    Lightweight, low-cost and flexible electronic systems are the key to next-generation smart technologies for military as well as consumer and commercial applications.

    An Air Force Research Laboratory-led project in conjunction with NextFlex, America’s Flexible Hybrid Electronics Institute, has resulted in the first ever, functional samples of flexible Arduino circuit board systems made by using a flexible hybrid electronics manufacturing process, setting the stage for smart technologies for the internet of things and sensor applications like wearable devices.

More in Tux Machines

LLVM/AOCC, GCC at AMD

  • Radeon GCC Back-End Updated For Running Single-Threaded C & Fortran On AMD GPUs
    Back in September Code Sourcery / Mentor Graphics posted the Radeon GCC back-end they have been developing with the cooperation of AMD. This is for allowing the GCC compiler to eventually offload nicely to Radeon GPUs with its different programming languages and supported parallel programming models, particularly with OpenMP and OpenACC in mind. But for now this patch series just works with single-threaded C and Fortran programs. The second version of this port was posted for review. Hitting the GCC mailing list on Friday was the updated version of this AMD GCN port targeting Tonga/Fiji through Vega graphics hardware. Code Sourcery will post the OpenACC/OpenMP support bits at a later date while for now the code works with single-threaded C/Fortran programs with C++ not yet supported, among other initial shortcomings. For now the AMDGPU LLVM back-end is far more mature in comparison, which is what's currently used by the open-source AMD Linux driver compute and graphics stacks.
  • AMD Optimizing C/C++ Compiler 1.3 Brings More Zen Tuning
    Earlier this month AMD quietly released a new version of their Optimizing C/C++ compiler in the form of AOCC 1.3. This new compiler release has more Zen tuning to try to squeeze even more performance out of Ryzen/EPYC systems when using their LLVM-based compiler. The AMD Optimizing C/C++ Compiler remains AMD's high performance compiler for Zen compared to the earlier AMD Open64 Compiler up through the Bulldozer days. AOCC is based on LLVM Clang with various patches added in. Fortunately, with time at least a lot of the AOCC patches do appear to work their way into upstream LLVM Clang. AOCC also has experimental Fortran language support using the "Flang" front-end that isn't as nearly mature as Clang.

Security: Japan's Top Cybersecurity Official, SuperCooKey, Information Breach on HealthCare.gov

  • Security News This Week: Japan's Top Cybersecurity Official Has Never Used a Computer
  • SuperCooKey – A SuperCookie Built Into TLS 1.2 and 1.3

    TLS 1.3 has a heavily touted feature called 0-RTT that has been paraded by CloudFlare as a huge speed benefit to users because it allows sessions to be resumed quickly from previous visits. This immediately raised an eyebrow for me because this means that full negotiation is not taking place.

    After more research, I’ve discovered that 0-RTT does skip renegotiation steps that involve generating new keys.

    This means that every time 0-RTT is used, the server knows that you’ve been to the site before, and it knows all associated IPs and sign-in credentials attached to that particular key.

  • Information Breach on HealthCare.gov

    In October 2018, a breach occurred within the Marketplace system used by agents and brokers. This breach allowed inappropriate access to the personal information of approximately 75,000 people who are listed on Marketplace applications.

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